ADUC7034BCPZ-RL Analog Devices Inc, ADUC7034BCPZ-RL Datasheet - Page 13

• Manufacturer Part Number: ADUC7034BCPZ-RL
• Description: IC,Battery Management,LLCC,48PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7034BCPZ-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 48-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 5. SPI Slave Mode Timing—PHASE Mode = 0
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
1
2
SS
SL
SH
DAV
DSU
DHD
DF
DR
SR
SF
DOCS
SFS
t
t
HCLK
UCLK
depends on the clock divider (CD) bits in the POWCON MMR. t
= 48.8 ns and corresponds to the 20.48 MHz internal clock from the PLL before the clock divider.
Description
SS to SCLK edge
SCLK low pulse width
SCLK high pulse width
Data output valid after SCLK edge
Data input setup time before SCLK edge
Data input hold time after SCLK edge
Data output fall time
Data output rise time
SCLK rise time
SCLK fall time
Data output valid after SS edge
SS high after SCLK edge
(POLARITY = 0)
(POLARITY = 1)
SCLK
SCLK
MISO
MOSI
SS
t
DOCS
t
1
CS
1
t
DSU
MSB IN
MSB
t
DHD
2
Figure 5. SPI Slave Mode Timing—PHASE Mode = 0
t
SH
2
t
DF
2
t
HCLK
DAV
= t
Min
4 × t
0
Rev. B | Page 13 of 136
t
SL
UCLK
t
UCLK
/2
DR
CD
BITS [6:1]
.
BITS [6:1]
Typ
½ t
(SPIDIV + 1) × t
(SPIDIV + 1) × t
3.5
3.5
3.5
3.5
½ t
SL
SL
LSB IN
t
SR
LSB
HCLK
HCLK
t
SF
t
SFS
Max
(3 × t
(3 × t
UCLK
UCLK
) + (2 × t
) + (2 × t
ADuC7034
HCLK
HCLK
)
)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns