ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 130

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ALXD800EEXJCVD C3

Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJCVD C3

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
5.5.2.22 Temporary MSRs
Temporary 0 MSR (TEMP0_MSR)
MSR Address
Type
Reset Value
Temporary 1 MSR (TEMP1_MSR)
MSR Address
Type
Reset Value
130
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:32
31:0
Bit
Bit
1
0
Name
DMI_GPF
DMI_INST
Name
RSVD
TEMPx
00001310h
R/W
xxxxxxxx_xxxxxxxxh
00001311h
R/W
xxxxxxxx_xxxxxxxxh
33234H
DMI Control Register Bit Descriptions (Continued)
Description
DMI General Protection Faults. When enabled and not in DMM mode, allow general
protection faults to generate DMIs.
0: Disable.
1: Enable.
DMI Instructions. Enable DMI instructions DMINT and RDM. If not enabled, executing a
DMI instruction generates an invalid operation fault.
0: Disable.
1: Enable.
Description
Reserved. Write as read.
Temporary x. Used by microcode, usually for holding operands for address calculations.
TEMPx_MSR Bit Descriptions
TEMPx_MSR Register Map
TEMPx
RSVD
Temporary 2 MSR (TEMP2_MSR)
MSR Address
Type
Reset Value
Temporary 3 MSR (TEMP3_MSR)
MSR Address
Type
Reset Value
00001312h
R/W
xxxxxxxx_xxxxxxxxh
00001313h
R/W
xxxxxxxx_xxxxxxxxh
AMD Geode™ LX Processors Data Book
9
8
CPU Core Register Descriptions
7
6
5
4
3
2
1
0

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