ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 509
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ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Video Input Port Register Descriptions
6.10.2.31 VIP Task A V Even Offset (VIP_TASK_A_V_EVEN_OFFSET)
VIP Memory Offset 80h
Type
Reset Value
AMD Geode™ LX Processors Data Book
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:0
Bit
Name
TASK_A_V_
EVEN_OFFSET
R/W
00000000h
VIP_TASK_A_V_EVEN_OFFSET Bit Descriptions
Description
Task A V Even Offset. This register determines the starting address of the V buffer for
the even field when in interlaced input mode and data is stored in planar format. This reg-
ister is not used when in non-interlaced input mode. The value in this register needs to be
32-byte aligned. (Bits [4:0] are required to be 00000.)
VIP_TASK_A_V_EVEN_OFFSET Register Map
TASK_A_V_EVEN_OFFSET
9
8
33234H
7
6
5
4
Program to 00000
3
2
1
509
0
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