ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 157

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ALXD800EEXJCVD C3

Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJCVD C3

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
CPU Core Register Descriptions
5.5.2.60 L1 Instruction TLB Entry MSRs
ITB Entry MSR (ITB_ENTRY_MSR)
MSR Address
Type
Reset Value
ITB Entry with Increment MSR (ITB_ENTRY_I_MSR)
MSR Address
Type
Reset Value
AMD Geode™ LX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:44
43:32
31:12
10:5
Bits
11
4
3
2
1
0
Name
LINADDR
RSVD (RO)
PHYSADDR
WS
RSVD (RO)
CD
RSVD (RO)
US
RSVD (RO)
V
ITB_ENTRY_MSR, ITB_ENTRY_I_MSR, ITB_L0_ENTRY_MSR Bit Descriptions
ITB_ENTRY_MSR, ITB_ENTRY_I_MSR, ITB_L0_ENTRY_MSR Register Map
00001722h
R/W
xxxxxxxx_xxxxxxxxh
00001723h
R/W
xxxxxxxx_xxxxxxxxh
Description
Linear Address.
Reserved (Read Only). (Default = 0)
Physical Address.
Write Serialize Property.
0: Not write serialized. (Default)
1: Write serialized.
Reserved (Read Only). (Default = 0)
Cache Disable.
0: Cache enabled.
1: Cache disabled.
Reserved (Read Only). (Default = 0)
User Access Privileges.
0: Supervisor.
1: User.
Reserved (Read Only). (Default = 0)
Valid Bit.
0: Not valid. (Default)
1: Valid.
PHYSADDR
LINADDR
ITB L0 Cache Entry MSR (ITB_L0_ENTRY_MSR)
MSR Address
Type
Reset Value
WS
00001724h
R/W
xxxxxxxx_xxxxxxxxh
9
RSVD
8
33234H
7
RSVD
6
5
CD
4
3
US
2
1
157
V
0

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