ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 491
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ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Video Input Port Register Descriptions
AMD Geode™ LX Processors Data Book
23:21
20:16
14:8
Bit
7:5
4:3
2:0
26
25
24
15
Name
ANCPEN
LPB
FF_R/W
PAGE_CNT
ANC_FF_
THRESH
RSVD
VID_FF_
THRESH
SYNC_TO_PIN
FIELD_TO_DC
SYNC_TO_DC
Description
Ancillary Parity Check Enable. When set to 1, ancillary DID, SDID, NN, and check sum
bytes are checked for even parity. The error is reported on MSR 4002002h[23]. When
this bit is 0, the Ancillary Checksum or Parity Error bit only indicates ancillary checksum
errors.
VOP to VIP Loopback. When set to 1, the VOP clock and data are used as the clock
and data inputs to the VIP. This allows for loopback testing of the VOP and VIP functions.
This bit must be set to 0 for normal VIP operation.
FIFO R/W Enable. When set to 1, the FIFO Address (VIP Memory Offset 70h) and FIFO
Data (VIP Memory Offset 74h) registers can be used to write and read the 256x32 bit
FIFO. This bit must be set to 0 for normal VIP operation.
Page Count. Determines how many pages of video data are used. When this value is
000, a single page of video data is stored (Default). Additional pages are saved by add-
ing the value in the Page Offset register (VIP Memory Offset 68h) to each base.
000: 1 Page. (Default)
001: 2 Pages.
“
111: 8 Pages.
Ancillary FIFO Threshold. Watermark level for setting the ancillary FIFO threshold. This
value also determines when the secondary priority is used during a write request. If the
FIFO WORD count exceeds this value, the secondary priority ID is used. An INT or SMI
can also be generated if this threshold is exceeded. Threshold value. 0-31.
The Ancillary FIFO depth is always 64 QWORDs.
Reserved.
Video FIFO Threshold. Watermark level for setting the video FIFO threshold. This value
also determines when the secondary priority is used during a write request. If the FIFO
WORD count exceeds this value, the secondary priority ID is used. An INT or SMI can
also be generated if this threshold is exceeded. Threshold value. 0-127
Linear mode: Y buffer depth is 192 QWORDs.
Planar mode: Y,U,V buffer depths are all 64 QWORDs
Sync Select. Selects signal timing for VIP_VSYNC pin.
000: 0 (output disabled).
001: Select vsync_in from DC.
010: Select vsync_in from DC (inverted).
011: Select bit 17 of Status register (VIP Memory Offset 08h).
100-111: 0.
Field to DC Select. Selects signal for field_to_vg.
00: Field input.
01: Inverted field input.
10: LSB of page being written (indicates which page is currently active).
11: Inverted LSB of page being written.
VSYNC Select. Selects signal timing for VIP_VSYNC output to the DC.
000: Sync from pin.
001: Inverted sync from pin.
010: VBLANK.
011: Inverted VBLANK.
100: Field.
101: Inverted field.
110: When vip_current_line = target_line.
111: 0.
VIP_CTL_REG2 Bit Descriptions (Continued)
33234H
491
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