ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 271
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ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Graphics Processor Register Definitions
6.4.2.18 Command Bottom (GP_CMD_BOT)
GP Memory Offset 54h
Type
Reset Value
This register defines the ending address of the command buffer within the command buffer region. Bits [23:0] of this register
are combined with the CBASE in GLD_MSR_CONFIG (MSR A0002001h) to form the 32 bit address. This register should
only be changed when the GP is not actively executing out of the command buffer, which can be checked by reading the CE
bit in GP_BLT_STATUS (GP Memory Offset 44h[4]) or by verifying that GP_CMD_READ and GP_CMD_WRITE (GP Mem-
ory Offset 58h and 5Ch respectively) have the same value.
6.4.2.19 Command Read (GP_CMD_READ)
GP Memory Offset 58h
Type
Reset Value
This register points to the location from which the GP fetches the next command buffer data. As data is fetched, this register
increments. When this register equals GP_CMD_BOT (GP Memory Offset 54h) and the data has been fetched, it is
reloaded with the value from GP_CMD_TOP (GP Memory Offset 50h). If the current command buffer had the W (wrap) bit
set in the command word, then this register is reset to GP_CMD_TOP after the execution of the current command buffer.
Typically, this register is read only by the software, and is used in combination with GP_CMD_WRITE (GP Memory Offset
5Ch) to determine how much space is available in the command buffer for new commands. However, this register can be
written. A write to this register also affects the GP_CMD_WRITE register such that when creating and initializing a new
command buffer in memory, the read and write pointers can be updated simultaneously to point to the beginning of the
buffer without the GP thinking that the buffer was non-empty and beginning to fetch. This register must not be written while
the GP is actually executing command buffers as this could cause the GP to hang.
AMD Geode™ LX Processors Data Book
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:24
31:24
23:5
23:0
Bit
4:0
Bit
RSVD
RSVD
Name
RSVD
CMD_BOT
RSVD
Name
RSVD
CMD_READ
R/W
00FFFFE0h
R/W
00000000h
Description
Reserved. Read returns 0.
Command Bottom. Ending address of the command buffer in the command buffer
region.
Reserved. Read returns 0.
Description
Reserved. Read returns 0.
Command Read. Pointer to the tail of the command buffer in the command buffer region.
GP_CMD_READ Bit Descriptions
GP_CMD_BOT Bit Descriptions
GP_CMD_READ Register Map
GP_CMD_BOT Register Map
CMD_BOT
CMD_READ
9
9
8
8
33234H
7
7
6
6
5
5
4
4
3
3
RSVD
2
2
1
1
271
0
0
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