ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 381

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ALXD800EEXJCVD C3

Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJCVD C3

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Display Controller Register Descriptions
6.6.21.5 Color Plane Enable
Index
Type
Reset Value
6.6.21.6 Horizontal Pel Panning
Index
Type
Reset Value
AMD Geode™ LX Processors Data Book
Bit
7:4
Bit
7:4
3:0
3
2
1
0
Name
RSVD
EN_CO_PN3
EN_CO_PN2
EN_CO_PN1
EN_CO_PN0
Name
RSVD
HPP
12h
R/W
xxh
13h
R/W
xxh
Horizontal Pel Panning Register Bit Descriptions
Description
Reserved.
Enable Color Plane 3. This bit enables color plane 3. It is ANDed with it corresponding
pixel bit and the resulting 4-bit value is used as the address into the EGA palette.
Enable Color Plane 2. This bit enables color plane 2. It is ANDed with it corresponding
pixel bit and the resulting 4-bit value is used as the address into the EGA palette.
Enable Color Plane 1. This bit enables color plane 1. It is ANDed with it corresponding
pixel bit and the resulting 4-bit value is used as the address into the EGA palette.
Enable Color Plane 0. This bit enables color plane 0. It is ANDed with it corresponding
pixel bit and the resulting 4-bit value is used as the address into the EGA palette.
Description
Reserved.
Horizontal Pel Panning: This field specifies how many pixels the screen image should
be shifted to the left by.
Color Plane Enable Register Bit Descriptions
Bits [3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Mode 13h
Panning
--
--
--
--
--
--
--
--
--
--
--
--
0
1
2
3
9-Wide Text Mode
Panning
--
--
--
--
--
--
--
1
2
3
4
5
6
7
8
0
33234H
Panning for All
Other Modes
--
--
--
--
--
--
--
0
1
2
3
4
5
6
7
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