EP4SGX290KF40C3N Altera, EP4SGX290KF40C3N Datasheet - Page 676

IC STRATIX IV GX 290K 1517FBGA

EP4SGX290KF40C3N

Manufacturer Part Number
EP4SGX290KF40C3N
Description
IC STRATIX IV GX 290K 1517FBGA
Manufacturer
Altera
Series
Stratix® IV GXr

Specifications of EP4SGX290KF40C3N

Number Of Logic Elements/cells
291200
Number Of Labs/clbs
11648
Total Ram Bits
17248
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1517-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2624

Available stocks

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Quantity
Price
Part Number:
EP4SGX290KF40C3N
Manufacturer:
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Quantity:
10 000
Part Number:
EP4SGX290KF40C3N
Manufacturer:
ALTERA
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2–4
Figure 2–2. Input Reference Clock Sources in a Transceiver Block
Stratix IV Device Handbook Volume 2: Transceivers
refclk1
refclk0
Figure 2–2
within a transceiver block. One global clock line is available for each CMU PLL and
receiver CDR in a transceiver block. This allows each CMU PLL and receiver CDR to
derive its input reference clock from a separate FPGA CLK input pin.
2
2
shows the input reference clock sources for CMU PLLs and receiver CDRs
PLL Cascade Clock
PLL Cascade Clock
PLL Cascade Clock
PLL Cascade Clock
PLL Cascade Clock
PLL Cascade Clock
Global Clock Line
Global Clock Line
Global Clock Line
Global Clock Line
Global Clock Line
Global Clock Line
ITB Clock Lines
ITB Clock Lines
ITB Clock Lines
ITB Clock Lines
ITB Clock Lines
ITB Clock Lines
6
6
6
6
6
6
Chapter 2: Transceiver Clocking in Stratix IV Devices
CMU1 PLL
CDR
CDR
CMU0 PLL
CDR
CDR
Transceiver Block
February 2011 Altera Corporation
CMU1 Channel
CMU0 Channel
Channel 3
Channel 2
Channel 1
Channel 0
Input Reference Clocking

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