MC68EC000EI8 Freescale Semiconductor, MC68EC000EI8 Datasheet - Page 45

• Manufacturer Part Number: MC68EC000EI8
• Description: IC MPU 32BIT 85MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC000EI8

• Processor Type: M680x0 32-Bit
• Speed: 8MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Core Size: 32 Bit
• Cpu Speed: 8MHz
• Digital Ic Case Style: PLCC
• No. Of Pins: 68
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Addressing Capabilities
2.2 EFFECTIVE ADDRESSING MODES
Besides the operation code, which specifies the function to be performed, an instruction
defines the location of every operand for the function. Instructions specify an operand
location in one of three ways. A register field within an instruction can specify the register to
be used; an instruction’s effective address field can contain addressing mode information;
or the instruction’s definition can imply the use of a specific register. Other fields within the
instruction specify whether the register selected is an address or data register and how the
register is to be used. Section 1 Introduction contains detailed register descriptions.
An instruction’s addressing mode specifies the value of an operand, a register that contains
the operand, or how to derive the effective address of an operand in memory. Each
addressing mode has an assembler syntax. Some instructions imply the addressing mode
for an operand. These instructions include the appropriate fields for operands that use only
one addressing mode.
2-4
IS
0
0
0
0
0
0
0
0
1
1
1
1
1
Table 2-2. IS-I/IS Memory Indirect Action Encodings
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
Index/Indirect
100–111
000
001
010
011
100
101
110
000
001
010
011
111
No Memory Indirect Action
Indirect Preindexed with Null Outer Displacement
Indirect Preindexed with Word Outer Displacement
Indirect Preindexed with Long Outer Displacement
Reserved
Indirect Postindexed with Null Outer Displacement
Indirect Postindexed with Word Outer Displacement
Indirect Postindexed with Long Outer Displacement
No Memory Indirect Action
Memory Indirect with Null Outer Displacement
Memory Indirect with Word Outer Displacement
Memory Indirect with Long Outer Displacement
Reserved
Operation
MOTOROLA