MC68EC000EI8 Freescale Semiconductor, MC68EC000EI8 Datasheet - Page 63

IC MPU 32BIT 85MHZ 68-PLCC

MC68EC000EI8

Manufacturer Part Number
MC68EC000EI8
Description
IC MPU 32BIT 85MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Series
M68000r
Datasheets

Specifications of MC68EC000EI8

Processor Type
M680x0 32-Bit
Speed
8MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Core Size
32 Bit
Cpu Speed
8MHz
Digital Ic Case Style
PLCC
No. Of Pins
68
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
0°C To +70°C
Filter Terminals
SMD
Rohs Compliant
Yes
Clock Frequency
8MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Addressing Capabilities
2.5 FULL EXTENSION ADDRESSING MODES
The full extension word format provides additional addressing modes for the MC68020,
MC68030, and MC68040. There are four elements common to these full extension
addressing modes: a base register (BR), an index register (Xn), a base displacement (bd),
and an outer displacement (od). Each of these four elements can be suppressed
independently of each other. However, at least one element must be active and not
suppressed. When an element is suppressed, it has an effective value of zero.
BR can be suppressed through the BS field of the full extension word format. The encoding
of bits 0-5 in the single effective address word format (see Figure 2-2) selects BR as either
the PC when using program relative addressing modes, or An when using non-program
relative addressing modes. The value of the PC is the address of the extension word. For
the non-program relative addressing modes, BR is the contents of a selected An.
SIZE and SCALE can be used to modify Xn. The W/L field in the full extension format selects
the size of Xn as a word or long word. The SCALE field selects the scaling factor, shifts the
value of the Xn left multiplying the value by 1, 2, 4, or 8, respectively, without actually
changing the value. Scaling can be used to calculate the address of arrayed structures.
Figure 2-4 illustrates the scaling of an Xn.
The bd and od can be either word or long word. The size of od is selected through the
encoding of the I/IS field in the full extension word format (refer to Table 2-2). There are two
main modes of operation that use these four elements in different ways: no memory indirect
action and memory indirect. The od is provided only for using memory indirect addressing
modes of which there are three types: with preindex, with postindex, and with index
suppressed.
2-22
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
MOTOROLA

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