MC68EC000EI8 Freescale Semiconductor, MC68EC000EI8 Datasheet - Page 607

• Manufacturer Part Number: MC68EC000EI8
• Description: IC MPU 32BIT 85MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC000EI8

• Processor Type: M680x0 32-Bit
• Speed: 8MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Core Size: 32 Bit
• Cpu Speed: 8MHz
• Digital Ic Case Style: PLCC
• No. Of Pins: 68
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

MOTOROLA
OR
ORI
ORI to CCR
ORI to SR
PACK
PBcc
PDBcc
PEA
PFLUSH
PFLUSHA
PFLUSHR
PFLUSHS
PLOAD
PMOVE
PRESTORE
PSAVE
PScc
PTEST
PTRAPcc
PVALID
RESET
ROL, ROR
ROXL, ROXR
RTD
RTE
RTM
RTR
RTS
SBCD
Scc
STOP
SUB
SUBA
SUBI
SUBQ
SUBX
SWAP
TAS
TBLS, TBLSN
TBLU, TBLUN
TRAP
TRAPcc
TRAPV
TST
UNLK
UNPK
Mnemonic
Table A-2. M68000 Family Instruction Set (Concluded)
MC68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
Logical Inclusive-OR
Logical Inclusive-OR Immediate
Inclusive-OR Immediate to Condition Code Register
Inclusive-OR Immediate to Status Register
Pack BCD
Branch on PMMU Condition
Test, Decrement, and Branch on PMMU Condition
Push Effective Address
Flush Entry(ies) in the ATCs
Flush Entry(ies) in the ATCs
Flush Entry(ies) in the ATCs and RPT Entries
Flush Entry(ies) in the ATCs
Load an Entry into the ATC
Move PMMU Register
PMMU Restore Function
PMMU Save Function
Set on PMMU Condition
Test a Logical Address
Trap on PMMU Condition
Validate a Pointer
Reset External Devices
Rotate Left and Right
Rotate with Extend Left and Right
Return and Deallocate
Return from Exception
Return from Module
Return and Restore
Return from Subroutine
Subtract Decimal with Extend
Set Conditionally
Stop
Subtract
Subtract Address
Subtract Immediate
Subtract Quick
Subtract with Extend
Swap Register Words
Test Operand and Set
Signed Table Lookup with Interpolate
Unsigned Table Lookup with Interpolate
Trap
Trap Conditionally
Trap on Overflow
Test Operand
Unlink
Unpack BCD
Description
Processor Instruction Summary
A-11