MC68EC000EI8 Freescale Semiconductor, MC68EC000EI8 Datasheet - Page 94

• Manufacturer Part Number: MC68EC000EI8
• Description: IC MPU 32BIT 85MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC000EI8

• Processor Type: M680x0 32-Bit
• Speed: 8MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Core Size: 32 Bit
• Cpu Speed: 8MHz
• Digital Ic Case Style: PLCC
• No. Of Pins: 68
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Instruction Set Summary
3.5 FLOATING-POINT COMPUTATIONAL ACCURACY
Representing a real number in a binary format of finite precision is problematic. If the
number cannot be represented exactly, a round-off error occurs. Furthermore, when two of
these inexact numbers are used in a calculation, the result becomes even more inexact. The
IEEE 754 standard defines the error bounds for calculating binary floating-point values so
that the result obtained by any conforming device can be predicted exactly for a particular
precision and rounding mode. The error bound defined by the IEEE 754 standard is one-half
unit in the last place of the destination data format in the RN mode, and one unit in last place
in the other rounding modes. The operation’s data format must have the same input values,
rounding mode, and precision. The standard also specifies the maximum allowable error
that can be introduced during a calculation and the manner in which rounding of the result
is performed.
The single- and double-precision formats provide emulation for devices that only support
those precisions. The execution speed of all instructions is the same whether using single-
or double-precision rounding. When using these two data formats, the FPU produces the
same results as any other device that conforms to the IEEE standard but does not support
extended precision. The results are the same when performing the same operation in
extended precision and storing the results in single- or double-precision format.
The FPU performs all floating-point internal operations in extended-precision. It supports
mixed-mode arithmetic by converting single- and double-precision operands to extended-
precision values before performing the specified operation. The FPU converts all memory
data formats to the extended-precision data format and stores the value in a floating-point
register or uses it as the source operand for an arithmetic operation. The FPU also converts
extended-precision data formats in a floating-point data register to any data format and
either stores it in a memory destination or in an integer data register.
Additionally if the external operand is a denormalized number, the number is normalized
before an operation is performed. However, an external denormalized number moved into a
floating-point data register is stored as a denormalized number. The number is first
normalized and then denormalized before it is stored in the designated floating-point data
register. This method simplifies the handling of all other data formats and types.
If an external operand is an unnormalized number, the number is normalized before it is
used in an arithmetic operation. If the external operand is an unnormalized zero (i.e., with a
mantissa of all zeros), the number is converted to a normalized zero before the specified
operation is performed. The regular use of unnormalized inputs not only defeats the purpose
of the IEEE 754 standard, but also can produce gross inaccuracies in the results.
MOTOROLA
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
3-23