MC68EC000EI8 Freescale Semiconductor, MC68EC000EI8 Datasheet - Page 79

• Manufacturer Part Number: MC68EC000EI8
• Description: IC MPU 32BIT 85MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC000EI8

• Processor Type: M680x0 32-Bit
• Speed: 8MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Core Size: 32 Bit
• Cpu Speed: 8MHz
• Digital Ic Case Style: PLCC
• No. Of Pins: 68
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Instruction Set Summary
3.1.3 Logical Instructions
The logical operation instructions (AND, OR, EOR, and NOT) perform logical operations
with all sizes of integer data operands. A similar set of immediate instructions (ANDI, ORI,
and EORI) provides these logical operations with all sizes of immediate data. Table 3-4
summarizes the logical operations.
3.1.4 Shift and Rotate Instructions
The ASR, ASL, LSR, and LSL instructions provide shift operations in both directions. The
ROR, ROL, ROXR, and ROXL instructions perform rotate (circular shift) operations, with
and without the CCR extend bit (X-bit). All shift and rotate operations can be performed on
either registers or memory.
Register shift and rotate operations shift all operand sizes. The shift count can be specified
in the instruction operation word (to shift from 1 – 8 places) or in a register (modulo 64 shift
count).
Memory shift and rotate operations shift word operands one bit position only. The SWAP
instruction exchanges the 16-bit halves of a register. Fast byte swapping is possible by using
the ROR and ROL instructions with a shift count of eight, enhancing the performance of the
shift/rotate instructions. Table 3-5 is a summary of the shift and rotate operations. In Table
3-5, C and X refer to the C-bit and X- bit in the CCR.
3-8
Instruction
ANDI
EORI
AND
EOR
NOT
ORI
OR
Operand Syntax
#<data>,<ea>
#<data>,<ea>
#<data>,<ea>
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
<ea>,Dn
Dn,<ea>
Dn,<ea>
<ea>,Dn
Dn,<ea>
<ea>
Table 3-4. Logical Operation Format
Operand Size
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
Source
Immediate Data
Source
Immediate Data
~ Destination
Source V Destination
Immediate Data V Destination
Destination
Destination
Destination
Destination
Destination
Operation
Destination
Destination
Destination
Destination
Destination
Destination
MOTOROLA