MC68EC000EI8 Freescale Semiconductor, MC68EC000EI8 Datasheet - Page 494

• Manufacturer Part Number: MC68EC000EI8
• Description: IC MPU 32BIT 85MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC000EI8

• Processor Type: M680x0 32-Bit
• Speed: 8MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Core Size: 32 Bit
• Cpu Speed: 8MHz
• Digital Ic Case Style: PLCC
• No. Of Pins: 68
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Supervisor (Privileged) Instructions
PFLUSH
PFLUSHA
PFLUSHS
6-40
Mode field—Specifies how the address translation cache is to be flushed.
Mask field—Indicates which bits are significant in the function code compare. A zero
FC field—Function code of address to be flushed. If the mode field is 001 (flush all
001—Flush all entries.
100—Flush by function code only.
101—Flush by function code including shared entries.
110—Flush by function code and effective address.
111—Flush by function code and effective address including shared entries.
indicates that the bit position is not significant; a one indicates that the bit position
is significant. If mode = 001 (flush all entries), mask must be 0000.
entries), function code must be 00000; otherwise:
1DDDD — Function code is specified as four bits DDDD.
01RRR — Function code is contained in CPU data register RRR.
00000 — Function code is contained in CPU SFC register.
00001 — Function code is contained in CPU DFC register.
The effective address field must provide the MC68851 with the
effective address of the entry to be flushed from the address
translation cache, not the effective address describing where the
PFLUSH operand is located. For example, in order to flush the
address translation cache entry corresponding to a logical
address that is temporarily stored on the top of the system stack,
the instruction PFLUSH [(SP)] must be used since PFLUSH
(SP) would invalidate the address translation cache entry
mapping the system stack (i.e., the effective address passed to
the MC68851 is the effective address of the system stack, not
the effective address formed by the operand located on the top
of the stack).
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
Invalidate Entries in the ATC
(MC68851)
NOTE
PFLUSHA
PFLUSHS
PFLUSH
MOTOROLA