UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 147

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
Caution Be sure to set (1) the interrupt mask flag (TMMK52) before clearing (0) TCE52 to avoid generating
Remarks 1. PWM output is at the inactive level in the PWM mode because TCE52 = 0.
an interrupt when TCE52 is cleared. The procedure to clear (0) TCE52 is as follows.
TMMK52 = 1
TCE52 = 0
TMIF52 = 0
TMMK52 = 0
TCE52 = 1
2. If LVS52 and LVR52 are read immediately after data has been set, these bits are 0.
TMC52
Symbol
·
·
·
·
·
·
Figure 7-6. Format of 8-Bit Timer Mode Control Register 52
TCE52 TMC526
TMC526
TMC524
TMC521
TCE52
LVS52
TOE52
7
0
1
0
1
0
1
0
0
1
1
0
1
0
1
; Mask set
; Timer clear
; Interrupt request flag clear
; Mask clear
; Timer start
Disables count operation after clearing counter
to 0 (disables prescaler).
LVR52
Disables output (port mode).
Starts counting.
Clears and starts on match between TM52 and
CR52.
PWM (free-running) mode
Single mode
Cascade mode (connected to TM51)
Enables output.
Disables inverted
operation.
Enables inverted
operation.
Timer output control of 8-bit timer/event
counter 52
mode (TMC526 = 0)
6
Other than PWM
Timer F/F control
0
1
0
1
CHAPTER 7 8-BIT TIMER/EVENT COUNTER
Single mode/cascade mode selection
TM52 operating mode selection
Not affected
Timer output F/F status setting of
8-bit timer/event counter 52
Resets timer output F/F (to 0).
Sets timer output F/F (to 1).
Setting prohibited
0
5
TM52 count operation control
TMC524
User’s Manual U13029EJ7V1UD
4
LVS52
3
Low active
High active
Active level selection
LVR52 TMC521 TOE52
(TMC526 = 1)
PWM mode
2
1
0
Address
FF78H
After reset
00H
R/W
R/W
145

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