UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 354

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

352
Instruction
Stack
manipulation
Unconditional
branch
Conditional
branch
Group
Notes 1. When the internal high-speed RAM area is accessed or when an instruction that does not access data
Remarks 1. One clock of an instruction is equal to one CPU clock (f
2. When an area other than the internal high-speed RAM area is accessed
Mnemonic
PUSH
POP
MOVW
BR
BC
BNC
BZ
BNZ
BT
BF
2. The number of clocks shown is when the program is stored in the internal ROM area.
3. n indicates the number of wait states when the external memory expansion area is read.
is executed
register (PCC).
PSW
rp
PSW
rp
SP, #word
SP, AX
AX, SP
!addr16
$addr16
AX
$addr16
$addr16
$addr16
$addr16
saddr.bit, $addr16
sfr.bit, $addr16
A.bit, $addr16
PSW.bit, $addr16
[HL].bit, $addr16
saddr.bit, $addr16
sfr.bit, $addr16
A.bit, $addr16
PSW.bit, $addr16
[HL].bit, $addr16
Operand
CHAPTER 19 INSTRUCTION SET
User’s Manual U13029EJ7V1UD
Byte
1
1
1
1
4
2
2
3
2
2
2
2
2
2
3
4
3
3
3
4
4
3
4
3
Note 1 Note 2
10
10
10
2
4
2
4
–
–
–
6
6
8
6
6
6
6
8
–
8
–
–
8
–
Clock
11 + n
11 + n
10
11
11
11
11
–
–
–
–
8
8
–
–
–
–
–
–
–
9
–
9
–
(SP – 1)
(SP – 1)
SP
PSW
rp
SP
SP
SP
AX
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
H
H
SP – 2
(SP + 1), rp
SP + 2
word
AX
SP
addr16
PC + 2 + jdisp8
PC + 2 + jdisp8 if CY = 1
PC + 2 + jdisp8 if CY = 0
PC + 2 + jdisp8 if Z = 1
PC + 2 + jdisp8 if Z = 0
PC + 3 + jdisp8 if (saddr.bit) = 1
PC + 4 + jdisp8 if sfr.bit = 1
PC + 3 + jdisp8 if A.bit = 1
PC + 3 + jdisp8 if PSW.bit = 1
PC + 3 + jdisp8 if (HL).bit = 1
PC + 4 + jdisp8 if (saddr.bit) = 0
PC + 4 + jdisp8 if sfr.bit = 0
PC + 3 + jdisp8 if A.bit = 0
PC + 4 + jdisp8 if PSW.bit = 0
PC + 3 + jdisp8 if (HL).bit = 0
CPU
A, PC
(SP), SP
) selected by the processor clock control
PSW, SP
rp
L
H
, (SP – 2)
Operation
X
L
SP + 1
(SP),
SP – 1
rp
L
,
Z AC CY
R
Flag
R
R