UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 217

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
A/D conversion
(8) Interrupt request flag (ADIF)
(9) AV
The interrupt request flag (ADIF) is not cleared even when the contents of analog input channel specification
register 0 (ADS0) are changed.
When the analog input pin is changed during A/D conversion, therefore, the chances are that the A/D
conversion result of the old analog input and interrupt request flags was set immediately before the contents
of ADS0 was rewritten. Consequently, ADIF may be set even if A/D conversion for the newly specified analog
input pin has not yet been completed when ADIF is read immediately after ADS0 has been rewritten (refer
to Figure 11-10).
To resume A/D conversion once it has been stopped, clear ADIF first.
Remark n = 0, 1, ......, 7
The AV
to ANI7/P17.
Therefore, even in applications that can be switched over to a backup power source, be sure to apply the same
voltage as V
INTAD0
ADCR0
DD
pin
DD
pin is the power supply pin to the analog circuit and supplies power to the input circuit of ANI0/P10
n = 0, 1, ......, 7
Main power supply
Figure 11-10. A/D Conversion End Interrupt Request Generation Timing
(ANln conversion starts)
DD0
Rewriting ADM0
as shown in Figure 11-11.
ANIn
Figure 11-11. Processing of AV
CHAPTER 11 A/D CONVERTER
User’s Manual U13029EJ7V1UD
ANIn
ANIn
(ANlm conversion starts)
Rewriting ADS0
Backup capacitor
ANIm
ANIn
DD
Pin
ADIF is set, but conversion
of ANlm is not complete
AV
V
AV
V
AV
DD0
SS0
REF
DD
SS
ANIm
ANIm
ANIm
215

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