UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 186

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

184
(2) Real-time output buffer register 1 (RTBL01, RTBH01)
4 bits
6 bits
Operating Mode
This register consists of two 4-bit
The addresses of RTBL01 and RTBH01 are mapped individually in the special function register (SFR) area
as shown in Figure 10-3.
When specifying 4 bits
When specifying 6 bits 1 channel as the operation mode, data is set to both RTBL01 and RTBH01 by writing
6-bit data to either RTBL01 or RTBH01. The data of both RTBL01 and RTBH01 can be read all at once
regardless of which address is specified.
Figure 10-3 shows the configuration of RTBL01 and RTBH01, and Table 10-3 shows operations during
manipulation of RTBL01 and RTBH01.
Note
Notes 1. Only the bits set in the real-time output port mode can be read. When the bit specified as RTPM01n
Table 10-3. Operation During Manipulation of Real-Time Output Buffer Register 1
1 channel
1 channel
For RTBH01, only 2 of the 4 bits are valid.
2. After setting data in the real-time output port, output data should be set in RTBL01 and RTBH01
= 0 (RTPM01n: bit n (n = 0 to 5) of real-time output port mode register 1 (RTPM01)) is read, 0 is
read.
by the time a real-time output trigger is generated.
Figure 10-3. Configuration of Real-Time Output Buffer Register 1
1 channel as the operation mode, data is set in RTBL01.
Register to Be
Manipulated
CHAPTER 10 REAL-TIME OUTPUT PORT
RTBH01
RTBL01
RTBL01
Note
FF9CH
FF9DH
User’s Manual U13029EJ7V1UD
registers that hold output data in advance.
RTBH01
Higher
2 bits
Higher 2 Bits
RTBH01
RTBH01
Invalid
RTBL01
Reading
Lower
4 bits
Note 1
Lower 4 Bits
RTBL01
RTBL01
RTBL01
Higher 2 Bits
RTBH01
RTBH01
Invalid
Writing
Note 2
Lower 4 Bits
RTBL01
RTBL01
RTBL01