UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 426

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

was applied.
424
3rd
Edition
A history of the revisions up to this edition is shown below. “Applied to:” indicates the chapters to which the revision
Change of status from “under development” to “development completed” for the
following products
1.4 Pin Configuration (Top View)
• Deletion of Cautions for AV
2.1 List of Pin Functions (2) Non-port pins
• Modification of descriptions for TI000, TI001, AV
2.2.5 P40 to P47 (Port 4) Modification of description for (2) Control mode
Addition of I/O circuit type description to Table 2-1 Types of Pin I/O Circuits
Addition of Figure 2-1 Pin I/O Circuit
Modification of description for TMC50, TMC51, TMC52 in Table 3-4 Special
Function Register List
4.3 Registers Controlling Port Functions
Addition of Caution to (1) Port mode registers (PM0, PM2, PM3, PM4, PM5, PM6)
Addition of Caution to (2) Pull-up resistor option registers (PU0, PU2, PU3, PU4,
PU5, PU6)
Modification of Figure 4-11 Format of Pull-Up Resistor Option Register
6.3 Configuration of 16-Bit Timer/Event Counter
Modification of Table 6-3 TI00n Pin Valid Edge and CR00n, CR01n Capture
Triggers
Modification of Caution in (3) 16-bit capture/compare register 010, 011 (CR010,
CR011)
Addition of Caution to Figure 6-5 Format of Capture/Compare Control Register 00
Addition of Caution to Figure 6-6 Format of Capture/Compare Control Register 01
Addition of Cautions to Figure 6-7 Format of Timer Output Control Register 00
Addition of Cautions to Figure 6-8 Format of Timer Output Control Register 01
Addition of Note to Figure 6-9 Format of Prescaler Mode Register 00
Addition of Note to Figure 6-10 Format of Prescaler Mode Register 01
Modification of Figure 6-13 Interval Timer Configuration Diagram
Modification of description in 6.5.4 External event counter operation
Modification of Figure 6-27 External Event Counter Configuration Diagram
6.6 Notes on 16-Bit Timer/Event Counter
Addition of description to (6) One-shot pulse output
Addition of description to (10) Capture operation
Addition of description to (12) Edge detection
7.2 Configuration of 8-Bit Timer/Event Counter
Modification of (2) 8-bit compare registers 50, 51, and 52 (CR50, CR51, and CR52)
7.3 Registers Controlling 8-Bit Timer/Event Counter
Modification of (1) 8-bit timer mode control registers 50, 51, and 52 (TMC50,
TMC51, and TMC52)
Modification of Figure 7-4 Format of 8-Bit Timer Mode Control Register 50
Modification of Figure 7-5 Format of 8-Bit Timer Mode Control Register 51
Modification of Figure 7-6 Format of 8-Bit Timer Mode Control Register 52
PD780982, 780983, and 780984
APPENDIX D REVISION HISTORY
DD
and AV
User’s Manual U13029EJ7V1UD
Contents
SS
connections
DD
, AV
SS
pins
Throughout
CHAPTER 1
GENERAL
CHAPTER 2
PIN FUNCTIONS
CHAPTER 3
CPU ARCHITECTURE
CHAPTER 4
PORT FUNCTIONS
CHAPTER 6
16-BIT TIMER/EVENT
COUNTER
CHAPTER 7
8-BIT TIMER/EVENT
COUNTER
Applied to:
(1/6)