UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 316

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
314
<RESET pin>
<Port pins>
When the
communicate in flash programmer are in the same status as immediately after reset.
If the external device does not recognize initial statuses such as the output high impedance status, therefore,
connect the external device to V
<Oscillator>
When using the on-board clock, connect X1 and X2 as required in the normal operation mode.
When using the clock output of the flash programmer, connect it directly to X1, disconnecting the main oscillator
on-board, and leave the X2 pin open.
<Power supply>
To use the power output from the flash programmer, connect the V
and the V
To use the on-board power supply, make connections that accord with the normal operation mode. However,
because the voltage is monitored by the flash programmer, be sure to connect VDD of the flash programmer.
Supply the same power as in the normal operation mode to the other power supply pins (AV
<Other pins>
Process the other pins (TO70 to TO75, AV
If the reset signal of the dedicated flash programmer is connected to the RESET pin connected to the reset signal
generator on-board, a signal conflict occurs. To prevent this, isolate the connection with the reset signal generator.
If the reset signal is input from the user system in the flash memory programming mode, a normal programming
operation cannot be performed. Therefore, do not input reset signals from other than the dedicated flash
programmer.
SS0
PD78F0988A enter the flash memory programming mode, all the pins other than those that
and V
PD78F0988A
SS1
RESET
pins to GND of the flash programmer.
The signal output by the reset signal generator and the signal output from
the dedicated flash programmer conflict in the flash memory programming
mode, so isolate the signal of the reset signal generator.
Figure 18-9. Signal Conflict (RESET Pin)
DD0
Signal conflict
or V
CHAPTER 18
SS0
User’s Manual U13029EJ7V1UD
REF
via a resistor.
, and TEST) in the same manner as in the normal operation mode.
Reset signal generator
Connection pin of
dedicated flash
programmer
PD78F0988A
Output pin
DD0
and V
DD1
pins to VDD of the flash programmer,
DD
and AV
SS
).

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