UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 388

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

386
Remarks 1. t
Caution
ASTB high-level width
Address setup time
Address hold time
Data input time from address
Address output time from RD
Data input time from RD
Read data hold time
RD low-level width
WAIT input time from RD
WAIT input time from WR
WAIT low-level width
Write data setup time
Write data hold time
WR low-level width
Delay time from ASTB to RD
Delay time from ASTB to WR
Delay time from RD at external
fetch to ASTB
Address hold output time from WR
Write data output time from RD
Write data output time from WR
Address hold time from RD
at external fetch
Delay time from WAIT to RD
Delay time from WAIT to WR
(2) Read/write operation (T
T
2. n indicates the number of waits.
3. C
CY
Parameter
CY
can only be used when the MIN. value is 0.238 s.
L
= 100 pF (C
= T
CHAPTER 21 ELECTRICAL SPECIFICATIONS (CONVENTIONAL PRODUCTS)
CY
/4
L
is the load capacitance of the AD0 to AD7, RD, WR, WAIT, and ASTB pins.)
A
= –40 to +85 C, V
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ASTH
ADS
ADH
ADD1
ADD2
RDAD
RDD1
RDD2
RDH
RDL1
RDL2
RDWT1
RDWT2
WRWT
WTL
WDS
WDH
WRL
ASTRD
ASTWR
RDAST
WRADH
RDWD
WRWD
RDADH
WTRD
WTWR
Symbol
User’s Manual U13029EJ7V1UD
DD
Conditions
= 4.0 to 5.5 V)
(1.5 + 2n)t
(2.5 + 2n)t
(0.5 + 2n)t
(1.5 + 2n)t
0.8t
0.8t
0.8t
2t
0.3t
0.8t
0.8t
CY
MIN.
CY
CY
CY
20
60
40
10
6
0
0
6
6
– 15
CY
CY
CY
– 15
– 15
– 15
CY
CY
CY
CY
– 33
– 33
+ 10
– 15
(2 + 2n)t
(3 + 2n)t
(2 + 2n)t
(3 + 2n)t
1.2t
1.2t
2.5t
2.5t
(2 + 2n)t
t
t
t
CY
CY
CY
1.2t
MAX.
100
CY
CY
CY
CY
60
– 43
– 43
– 25
CY
CY
CY
CY
CY
+ 30
+ 30
+ 25
+ 25
CY
– 54
– 60
– 87
– 93
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns