UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 86

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
3.4.8 Based indexed addressing
3.4.9 Stack addressing
84
[Function]
[Operand Format]
[Example]
[Function]
[Example]
This addressing is used to address the memory by using the result of adding the contents of the B or C register
specified in the instruction word to the contents of the HL register used as a base register. The HL, B, and C
registers accessed are in the register bank specified by the register bank select flags (RBS0 and RBS1). The
addition is executed with the contents of the B or C register extended to 16 bits as a positive number. A carry
from the 16th bit is ignored.
This addressing can address the entire memory space.
When MOV A, [HL + B]
This addressing is used to indirectly address the stack area by using the contents of the stack pointer (SP).
This addressing is automatically used to save/restore register contents when the PUSH, POP, subroutine call,
or return instruction is executed, or when an interrupt request is generated.
Stack addressing can access the internal high-speed RAM area only.
When PUSH DE is executed
Representation
[HL + B], [HL + C]
Instruction code
Instruction code
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U13029EJ7V1UD
1 0 1 0 1 0 1 1
1 0 1 1 0 1 0 1
Description

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