UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 156

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

7.5.4 8-bit PWM output operation
is set to 1.
of TMC5n.
154
The PWM output operation is performed when bit 6 (TMC5n6) of 8-bit timer mode control register 5n (TMC5n)
A pulse with a duty factor determined by the value set to 8-bit compare register 5n (CR5n) is output from TO5n.
Set the width of the active level of the PWM pulse to CR5n. The active level can be selected using bit 1 (TMC5n1)
The count clock can be selected by bits 0 to 2 (TCL5n0 to TCL5n2) of timer clock select register 5n (TCL5n).
PWM output can be enabled or disabled by bit 0 (TOE5n) of TMC5n.
(1) Basic operation of PWM output
<Setting>
<PWM output operation>
<1> Clear the port latch and port mode register 2 (PM2) to 0.
<2> Set an active level width with 8-bit compare register 5n (CR5n).
<3> Select a count clock with timer clock select register 5n (TCL5n).
<4> Set an active level using bit 1 (TMC5n1) of TMC5n.
<5> The count operation is started when bit 7 (TCE5n) of TMC5n is set to 1.
<1> When the count operation is started, an inactive level is output as the PWM output (output from TO5n)
<2> When an overflow occurs, the active level set in step <1> above is output. This active level is continuously
<3> An inactive level is output as the PWM output after the value of CR5n has matched the count value of
<4> After that, <2> and <3> are repeated until the count operation is stopped.
<5> When the count operation is stopped by clearing TCE5n to 0, the PWM output becomes inactive.
Remark n = 0 to 2
To stop the count operation, clear TCE5n to 0.
until an overflow occurs.
output until the value of CR5n matches the count value of 8-bit timer counter 5n (TM5n).
TM5n, until an overflow occurs again.
CHAPTER 7 8-BIT TIMER/EVENT COUNTER
User’s Manual U13029EJ7V1UD