UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 178

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
176
(2) Watchdog timer mode register (WDTM)
This register sets the operation mode of the watchdog timer, and enables/disables counting of the watchdog
timer.
WDTM is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Notes
Caution When the watchdog timer is cleared by setting RUN to 1, the actual overflow time is up to
Remark
Symbol
WDTM
1. Once WDTM3 and WDTM4 have been set to 1, they cannot be cleared to 0 by software.
2. The watchdog timer starts operating as an interval timer as soon as the RUN bit has been set
3. Once RUN has been set to 1, it cannot be cleared to 0 by software. Therefore, when counting
2
8
: don’t care
to 1.
is started, it cannot be stopped by any means other than RESET input.
/f
WDTM4
X
RUN
RUN
seconds shorter than the time set by the watchdog timer clock select register (WDCS).
7
0
1
1
0
1
WDTM3
Figure 9-3. Format of Watchdog Timer Mode Register
Stops counting.
Clears counter and starts counting.
6
0
0
1
Selection of watchdog timer operation
Interval timer mode
interrupt request occur)/PWM output off function
of TM7 by INTWDT can be used.
Watchdog timer mode 1 (overflow and non-maskable
interrupt request occur)/PWM output off function of
TM7 by INTWDT can be used.
Watchdog timer mode 2 (overflow occurs and reset
operation started)
5
Selection of operation mode of watchdog timer
and control of reset by watchdog timer and timer
interrupt
0
WDTM
CHAPTER 9 WATCHDOG TIMER
4
4
User’s Manual U13029EJ7V1UD
WDTM
3
3
Note 2
2
0
(overflow and maskable
1
0
Note 3
0
0
Address
FFF9H
Note 1
After reset
00H
R/W
R/W

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