UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 70

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

3.2.3 Special function registers (SFRs)
area of addresses FF00H to FFFFH.
using operation, transfer, and bit manipulation instructions. The bit units in which one register is to be manipulated
(1, 8, or 16 bits) differ from those of another register.
68
Unlike the general-purpose registers, special function registers have their own functions and are allocated to the
The special function registers can also be manipulated in the same manner as the general-purpose registers by
The bit unit for manipulation is specified as follows:
• 1-bit manipulation
• 8-bit manipulation
• 16-bit manipulation
Table 3-4 lists the special function registers. The meanings of the symbols in this table are as follows:
• Symbol
• R/W
• Bit unit for manipulation
• After reset
A symbol reserved by the assembler is described as the operand (sfr.bit) of a 1-bit manipulation instruction. An
address can also be specified.
A symbol reserved by the assembler is described as the operand (sfr) of an 8-bit manipulation instruction. An
address can also be specified.
A symbol reserved by the assembler is described as the operand (sfrp) of a 16-bit manipulation instruction. When
specifying an address, describe an even address.
These symbols indicate the addresses of the special function registers.
They are reserved words for the RA78K0 and defined by header file sfrbit.h for the CC78K0. These symbols
can be described as the operands of instructions when the RA78K0, ID78K0-NS, ID78K0, and SM78K0 are used.
Indicates whether the special function register in question can be read or written.
R/W: Read/write
R:
W:
“ ” indicates the manipulatable bit unit (1, 8, or 16). “—” indicates the bit units for which manipulation is not
possible.
Indicates the status of the special function register when the RESET signal is input.
Read only
Write only
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U13029EJ7V1UD