UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 289

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
15.3 Timing of External Device Expansion Function
The timing control signal output pins used in the external memory expansion mode are as follows.
(1) RD pin (alternate function: P64)
(2) WR pin (alternate function: P65)
(3) WAIT pin (alternate function: P66)
(4) ASTB pin (alternate function: P67)
(5) AD0 to AD7 pins (alternate function: P40 to P47)
Figures 15-5 to 15-8 show the timing charts.
This pin outputs a read strobe signal when an instruction is fetched or data is accessed from the external
memory.
When the internal memory is accessed, the read strobe signal is not output (instead, this pin holds a high
level).
This pin outputs a write strobe signal when the external memory is accessed for data.
When the internal memory is accessed, the write strobe signal is not output (this pin holds a high level).
This pin inputs an external wait signal.
When the external wait signal is not used, the WAIT pin can be used as an I/O port pin.
When the internal memory is accessed, the external wait signal is ignored.
This pin outputs an address strobe signal which is always output regardless of instruction fetch or data access
from the external memory.
The address strobe signal is also output when the internal memory is accessed.
These pins output address and data signals. The valid signals are output or input when instructions are fetched
or data is accessed from the external memory.
The status of the signal also changes when the internal memory is accessed (the output contents are
undefined).
CHAPTER 15 EXTERNAL DEVICE EXPANSION FUNCTION
User’s Manual U13029EJ7V1UD
287

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