ep1s25 Altera Corporation, ep1s25 Datasheet - Page 140

• Manufacturer Part Number: ep1s25
• Description: Stratix Device Family Data Sheet
• Manufacturer: Altera Corporation

I/O Structure
2–126
Stratix Device Handbook, Volume 1
LVTTL
LVCMOS
2.5 V
1.8 V
1.5 V
3.3-V PCI
3.3-V PCI-X 1.0
LVPECL
3.3-V PCML
LVDS
HyperTransport technology
Differential HSTL (clock
inputs)
Differential HSTL (clock
outputs)
Differential SSTL (clock
outputs)
3.3-V GTL
3.3-V GTL+
1.5-V HSTL Class I
1.5-V HSTL Class II
1.8-V HSTL Class I
1.8-V HSTL Class II
SSTL-18 Class I
SSTL-18 Class II
SSTL-2 Class I
SSTL-2 Class II
SSTL-3 Class I
Table 2–32. I/O Support by Bank (Part 1 of 2)
I/O Standard
Table 2–32
Top & Bottom Banks
(3, 4, 7 & 8)
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shows I/O standard support for each I/O bank.
Left & Right Banks
(1, 2, 5 & 6)
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Enhanced PLL External
Clock Output Banks
(9, 10, 11 & 12)
Altera Corporation
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July 2005