ep1s25 Altera Corporation, ep1s25 Datasheet - Page 260

• Manufacturer Part Number: ep1s25
• Description: Stratix Device Family Data Sheet
• Manufacturer: Altera Corporation

SW
Input jitter
tolerance
(peak-to-peak)
Output jitter
(peak-to-peak)
Output t
Output t
Table 4–125. High-Speed I/O Specifications for Flip-Chip Packages (Part 3 of 4)
Symbol
RISE
FALL
PCML (J = 4, 7,
8, 10)
PCML (J = 2)
PCML (J = 1)
LVDS and
LVPECL (J = 1)
LVDS,
LVPECL,
HyperTransport
technology
(J = 2 through
10)
All
All
LVDS
HyperTransport
technology
LVPECL
PCML
LVDS
HyperTransport
technology
LVPECL
PCML
Conditions
1,500
Min
750
900
500
440
110
110
105
80
90
80
80
90
-5 Speed Grade
Typ
110
170
130
110
110
170
130
140
Max
250
160
120
200
150
135
120
200
160
175
1,500
Min
750
900
500
440
110
110
105
80
90
80
80
90
-6 Speed Grade
Typ
110
170
130
110
110
170
130
140
Max
250
160
120
200
150
135
120
200
160
175
Notes
1,200
1,700
Min
800
550
500
120
100
110
100
110
80
80
80
(1),
-7 Speed Grade
(2)
110
170
135
110
110
170
135
145
Typ
Max
250
200
120
200
150
135
120
200
160
175
1,200
1,700
Min
800
550
500
120
100
110
100
110
80
80
80
-8 Speed Grade
Typ
110
170
135
110
110
170
135
145
Max
250
200
120
200
150
135
120
200
160
175
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps