ep1s25 Altera Corporation, ep1s25 Datasheet - Page 252

• Manufacturer Part Number: ep1s25
• Description: Stratix Device Family Data Sheet
• Manufacturer: Altera Corporation

Timing Model
4–82
Stratix Device Handbook, Volume 1
SSTL-2 Class II
SSTL-2 Class II
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.5-V HSTL Class I
1.5-V HSTL Class II
1.8-V HSTL Class I
1.8-V HSTL Class II
3.3-V PCI
3.3-V PCI-X 1.0
Compact PCI
AGP 1×
AGP 2×
CTT
Differential 1.5-V HSTL
C1
Differential 1.8-V HSTL
Class I
Differential 1.8-V HSTL
Class II
Differential SSTL-2
LVPECL
PCML
LVDS
HyperTransport
technology
Table 4–120. Stratix Maximum Output Clock Rate for PLL[5, 6, 11, 12] Pins
in Flip-Chip Packages (Part 2 of 2)
I/O Standard
(2)
(2)
(2)
(2)
(3)
(4)
(5)
(6)
-5 Speed
Grade
200
200
150
150
150
250
225
250
225
350
350
350
350
350
200
225
250
225
200
500
350
500
350
-6 Speed
Grade
200
200
134
133
133
225
200
225
200
300
300
300
300
300
200
200
225
200
200
500
350
500
350
-7 Speed
Grade
167
167
134
133
133
200
200
200
200
250
250
250
250
200
200
200
200
167
500
350
500
350
250
Altera Corporation
-8 Speed
Grade
167
167
134
133
133
200
200
200
200
250
250
250
250
250
200
200
200
200
167
500
350
500
350
January 2006
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit