h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 178

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h8s-2161b

Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 6 Bus Controller (BSC)
6.3.1
BCR is used to specify the access mode for the external address space or the I/O area range when
the AS/IOS pin is specified as an I/O strobe pin.
Bit
7
6
5
4
3
2
1
0
Rev. 3.00 Mar 21, 2006 page 124 of 788
REJ09B0300-0300
Bit Name
ICIS0
BRSTRM
BRSTS1
BRSTS0
IOS1
IOS0
Bus Control Register (BCR)
Initial Value
1
1
0
1
0
0
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
This bit should not be written by 0.
Idle Cycle Insertion
Selects whether or not to insert 1-state of the idle
cycle between bus cycles when the external write
cycle follows the external read cycle.
0: Idle cycle not inserted when the external write cycle
1: 1-state idle cycle inserted when the external write
Burst ROM Enable
Selects the bus interface for the external address
space.
0: Basic bus interface
1: Burst ROM interface
Burst Cycle Select 1
Selects the number of states in the burst cycle of the
burst ROM interface.
0: 1 state
1: 2 states
Burst Cycle Select 0
Selects the number of words that can be accessed by
burst access via the burst ROM interface.
0: Max, 4 words
1: Max, 8 words
Reserved
This bit should not be written by 0.
IOS Select 1, 0
Select the address range where the IOS signal is
output. For details, refer to table 6.3.
follows the external read cycle
cycle follows the external read cycle

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