h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 259

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h8s-2161b

Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
8.11.1
PADDR specifies input or output for the pins of port A on a bit-by-bit basis.
8.11.2
PAODR stores output data for port A.
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Bit Name
PA7DDR
PA6DDR
PA5DDR
PA4DDR
PA3DDR
PA2DDR
PA1DDR
PA0DDR
Bit Name
PA7ODR
PA6ODR
PA5ODR
PA4ODR
PA3ODR
PA2ODR
PA1ODR
PA0ODR
Port A Data Direction Register (PADDR)
Port A Output Data Register (PAODR)
Initial Value
Initial Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
W
W
W
W
W
W
W
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
In mode 1, 2 (EXPE = 0), or 3:
The corresponding port A pins are output ports
when PADDR bits are set to 1, and input ports
when cleared to 0.
In mode 2 (EXPE = 1):
The corresponding port A pins are address output
when PADDR bits are set to 1, and input ports
when cleared to 0. The port A pins changes from
the address I/O ports to output ports by setting
the IOSE bit to 1.
PA7 to PA2 pins are used as the keyboard buffer
controller I/O pins by setting the KBIOE bit to 1
regardless of the operating mode, while the I/O
direction according to PA7DDR to PA2DDR is
ignored.
PADDR has the same address as PAPIN, if read,
port A status is returned.
Description
PAODR can always be read or written to,
regardless of the contents of PADDR.
Rev. 3.00 Mar 21, 2006 page 205 of 788
Section 8 I/O Ports
REJ09B0300-0300

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