h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 522

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 16 I
16.4.7
The interrupt request flag (IRIC) is set at different times depending on the WAIT bit in ICMR, the
FS bit in SAR, and the FSX bit in SARX. If the ICDRE or ICDRF flag is set to 1, SCL is
automatically held low after one frame has been transferred in synchronization with the internal
clock. Figures 16.26 to 16.28 show the IRIC set timing and SCL control.
Rev. 3.00 Mar 21, 2006 page 468 of 788
REJ09B0300-0300
When WAIT = 0, and FS = 0 or FSX = 0 (I
SCL
SDA
IRIC
User processing
SCL
SDA
IRIC
User processing
IRIC Setting Timing and SCL Control
2
C Bus Interface (IIC) (Optional)
7
7
7
7
Figure 16.26 IRIC Setting Timing and SCL Control (1)
(a) Data transfer ends with ICDRE = 0 at transmission, or ICDRF = 0 at reception
(b) Data transfer ends with ICDRE = 1 at transmission, or ICDRF = 1 at reception
8
8
8
8
2
C bus format, no wait)
9
A
9
A
Clear IRIC
Clear IRIC
1
1
Write to ICDR (transmit)
or read from ICDR (receive)
2
2
3
1
1
3
Clear IRIC