h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 554
h8s-2161b
Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2161B.pdf
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Section 17 Keyboard Buffer Controller
17.4.3
This LSI (system side) can forcibly abort transmission from the device connected to it (keyboard
side) in the event of a protocol error, etc. In this case, the system holds the clock low. During
reception, the keyboard also outputs a clock for synchronization, and the clock is monitored when
the keyboard output clock is high. If the clock is low at this time, the keyboard judges that there is
an abort request from the system, and data transmission from the keyboard is aborted. Thus the
system can abort reception by holding the clock low for a certain period. A sample receive abort
processing flowchart is shown in figure 17.7, and the receive abort timing in figure 17.8.
Rev. 3.00 Mar 21, 2006 page 500 of 788
REJ09B0300-0300
KCLK
(pin state)
KD
(pin state)
KCLK
(output)
KD
(output)
KCLK
(input)
KD
(input)
[1] [2] [3] [4] [5]
Receive Abort
I/O inhibit
Start bit
Start bit
[6]
1
Figure 17.6 Transmit Timing
0
0
2
1
1
8
7
7
9
Parity bit Stop bit
Parity bit Stop bit
10
Receive
completed
notification
[7]
11
[8]
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