h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 336
h8s-2161b
Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2161B.pdf
(845 pages)
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Section 11 16-Bit Free-Running Timer (FRT)
11.7.3
If a compare-match occurs during the state after an OCRA or OCRB write cycle, the write takes
priority and the compare-match signal is disabled. Figure 11.19 shows the timing for this type of
conflict.
If automatic addition of OCRAR and OCRAF to OCRA is selected, and a compare-match occurs
in the cycle following the OCRA, OCRAR, and OCRAF write cycle, the OCRA, OCRAR and
OCRAF write takes priority and the compare-match signal is disabled. Consequently, the result of
the automatic addition is not written to OCRA. Figure 11.20 shows the timing for this type of
conflict.
Rev. 3.00 Mar 21, 2006 page 282 of 788
REJ09B0300-0300
Conflict between OCR Write and Compare-Match
Figure 11.19 Conflict between OCR Write and Compare-Match
Address
Internal write
signal
FRC
OCR
Compare-match
signal
(When Automatic Addition Function Is Not Used)
Write cycle of OCR
T 1
OCR address
T 2
N
N
Write data
M
N + 1
Disabled
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