h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 501
h8s-2161b
Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2161B.pdf
(845 pages)
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12. Clear the IRIC flag to 0.
User processing
Figure 16.9 Example of Operation Timing in Master Transmit Mode (MLS = WAIT = 0)
(master output)
(master output)
(slave output)
Note:* Data write
Write 0 to ACKE in ICCR, to clear received ACKB contents to 0.
Write 0 to BBSY and SCP in ICCR. This changes SDA from low to high when SCL is high,
and generates the stop condition.
ICDRE
ICDRS
ICDRT
SDA
IRTR
IRIC
SDA
SCL
in ICDR
prohibited
Start condition generation
[4] BBSY set to 1
SCP cleared to 0
(start condition issuance)
[5]
Interrupt
request
Address + R/W
Address + R/W
Bit 7
[6] ICDR write
1
Bit 6
2
Bit 5
Slave address
3
Bit 4
[6] IRIC clear
4
Bit 3
5
Bit 2
Section 16 I
6
Rev. 3.00 Mar 21, 2006 page 447 of 788
Bit 1
7
[9] ICDR write
R/W
Bit 0
8
2
C Bus Interface (IIC) (Optional)
[7]
A
9
Interrupt
request
[9] IRIC clear
Data 1
REJ09B0300-0300
Bit 7
Data 1
1
Data 1
Bit 6
2
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