h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 603

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Bit
7
6
5
STR3 (TWRE = 1 or SELSTR3 = 0)
Bit Name Initial Value Slave Host Description
IBF3B
OBF3B
MWMF
0
0
0
R/(W) * R
R
R
R/W
R
R
Bidirectional Data Register Input Buffer Full
Set to 1 when the host processor writes to TWR15.
This is an internal interrupt source to the slave
processor (this LSI). IBF3B is cleared to 0 when the
slave processor reads TWR15.
0: [Clearing condition]
When the slave processor reads TWR15
1: [Setting condition]
When the host processor writes to TWR15 using I/O
write cycle
Bidirectional Data Register Output Buffer Full
Set to 1 when the slave processor (this LSI) writes to
TWR15. OBF3B is cleared to 0 when the host
processor reads TWR15.
0: [Clearing condition]
When the host processor reads TWR15 using I/O
read cycle, or the slave processor writes 0 to the
OBF3B bit
1: [Setting condition]
When the slave processor writes to TWR15
Master Write Mode Flag
Set to 1 when the host processor writes to TWR0.
MWMF is cleared to 0 when the slave processor
(this LSI) reads TWR15.
0: [Clearing condition]
When the slave processor reads TWR15
1: [Setting condition]
When the host processor writes to TWR0 using I/O
write cycle while SWMF = 0
Section 19 Host Interface LPC Interface (LPC)
Rev. 3.00 Mar 21, 2006 page 549 of 788
REJ09B0300-0300