h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 385
h8s-2161b
Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2161B.pdf
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contents of TICR and TCORC. Caution is required if the rising edge of the IHI signal precedes the
fall timing set by the contents of TCORC, since the IHI signal will cause the CL3 signal to fall.
Examples of TCR settings of TMR_X are the same as those in table 13.4. The clamp waveform
timing charts are shown in figures 13.3 and 13.4.
Since the rise of the CL1 and CL2 signals is synchronized with the edge of the IHI signal, and
their fall is synchronized with the system clock, the pulse width variation is equivalent to the
resolution of the system clock.
Both the rise and the fall of the CL3 signal are synchronized with the system clock and the pulse
width is fixed, but there is a variation in the phase relationship with the IHI signal equivalent to
the resolution of the system clock.
TICR + TCORC
Figure 13.3 Timing Chart for Clamp Waveform Generation (CL1 and CL2 Signals)
IHI signal
CL1 signal
CL2 signal
TCNT
TCORA
IHI signal
CL3 signal
TCNT
TICR
Figure 13.4 Timing Chart for Clamp Waveform Generation (CL3 Signal)
Rev. 3.00 Mar 21, 2006 page 331 of 788
Section 13 Timer Connection
REJ09B0300-0300
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