h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 568

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h8s-2161b

Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 18 Host Interface X-Bus Interface (XBS)
18.3.2
HICR controls host interface channel 1 and 2 interrupts and the fast A20 gate function. HICR2
controls host interface channel 3 and 4 interrupts.
Bit
7 to 3
2
1
Rev. 3.00 Mar 21, 2006 page 514 of 788
REJ09B0300-0300
HICR
Bit Name
IBFIE2
IBFIE1
Host Interface Control Register (HICR)
Host Interface Control Register 2 (HICR2)
Initial
Value
All 1
0
0
Slave
R/W
R/W
R/W
Host
Reserved
These bits are always read as 1 and cannot be
modified.
Input Data Register Full Interrupt Enable 2
Enables or disables the IBF2 interrupt to the
internal CPU.
0: Input data register (IDR_2) reception
1: Input data register (IDR_2) reception
Input Data Register Full Interrupt Enable 1
Enables or disables the IBF1 interrupt to the
internal CPU.
0: Input data register (IDR_1) reception
1: Input data register (IDR_1) reception
Description
completed interrupt request disabled
completed interrupt request enabled
completed interrupt request disabled
completed interrupt request enabled

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