h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 306

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 10 14-Bit PWM Timer (PWMX)
Table 10.3 summarizes the relationships between the CKS, CFS, and OS bit settings and the
resolution, base cycle, and conversion cycle. The PWM output remains fixed unless DADR
contains at least a certain minimum value.
Table 10.3 Settings and Operation (Examples when = 10 MHz)
Note:
Rev. 3.00 Mar 21, 2006 page 252 of 788
REJ09B0300-0300
CKS
0
1
Resolution
* This column indicates the conversion cycle when specific DADR bits are fixed.
(µs)
0.1
0.2
T
CFS
0
1
0
1
Cycle
Base
25.6
12.8
51.2
(µs)
6.4
Conversion
1638.4
3276.8
Cycle
(µs)
1. Always low (or high)
2. (Data value)
1. Always low (or high)
2. (Data value)
1. Always low (or high)
2. (Data value)
1. Always low (or high)
2. (Data value)
(DADR = H'0001 to
H'03FD)
(DADR = H'0401 to
H'FFFD)
(DADR = H'0003 to
H'00FF)
(DADR = H'0103 to
H'FFFF)
(DADR = H'0001 to
H'03FD)
(DADR = H'0401 to
H'FFFD)
(DADR = H'0003 to
H'00FF)
(DADR = H'0103 to
H'FFFF)
T
T
H
L
(if OS = 0)
(if OS = 1)
T
T
T
T
Precision
(Bits)
Fixed DADR Bits
14
12
10
14
12
10
14
12
10
14
12
10
3 2 1 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
Bit Data
0 0
0 0
0 0
0 0
Conversion
Cycle *
1638.4
1638.4
3276.8
3276.8
(µs)
409.6
102.4
409.6
102.4
819.2
204.8
819.2
204.8