PIC18F24J11 MICROCHIP [Microchip Technology], PIC18F24J11 Datasheet - Page 272

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PIC18F24J11

Manufacturer Part Number
PIC18F24J11
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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registers. These include a status register (SSPxSTAT)
PIC18F46J11 FAMILY
19.2
Each MSSP module has three associated control
and two control registers (SSPxCON1 and SSPxCON2).
The use of these registers and their individual Configura-
tion bits differ significantly depending on whether the
MSSP module is operated in SPI or I
Additional details are provided under the individual
sections.
19.3
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes of SPI are supported.
When MSSP2 is used in SPI mode, it can optionally be
configured to work with the SPI DMA submodule
described in
To accomplish communication, typically three pins are
used:
• Serial Data Out (SDOx) – RC5/SDO1/RP16 or
• Serial Data In (SDIx) – RC4/SDI1/SDA1/RP15 or
• Serial Clock (SCKx) – RC3/SCK1/SCL1/RP14 or
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SSx) – RA5/AN4/SS1/
Figure 19-1
module when operating in SPI mode.
DS39932D-page 272
Note:
SDO2/Remappable
SDI2/Remappable
SCK2/Remappable
HLVDIN/RP2 or SS2/Remappable
Control Registers
SPI Mode
In devices with more than one MSSP
module, it is very important to pay close
attention
names. SSP1CON1 and SSP1CON2
control different operational aspects of the
same module, while SSP1CON1 and
SSP2CON1 control the same features for
two different modules.
depicts the block diagram of the MSSP
Section 19.4 “SPI DMA
to
the
SSPxCON
2
C mode.
Module”.
register
FIGURE 19-1:
Note:
SCKx
SDOx
SDIx
SSx
Only port I/O names are used in this diagram for
the sake of brevity. Refer to the text for a full list of
multiplexed functions.
Read
SSx Control
Select
SMP:CKE
Edge
bit 0
Select
Edge
MSSPx BLOCK DIAGRAM
(SPI MODE)
Enable
 2011 Microchip Technology Inc.
TRIS bit
SSPxBUF reg
Data to TXx/RXx in SSPxSR
SSPxSR reg
2
Clock Select
SSPM<3:0>
4
2
(
Prescaler
4, 16, 64
TMR2 Output
Write
Clock
Shift
Data Bus
Internal
2
T
OSC
)

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