PIC18F24J11 MICROCHIP [Microchip Technology], PIC18F24J11 Datasheet - Page 357

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PIC18F24J11

Manufacturer Part Number
PIC18F24J11
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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21.2
The ADCON1 register allows the user to select an
acquisition time that occurs each time the GO/DONE
bit is set.
When the GO/DONE bit is set, sampling is stopped and
a conversion begins. The user is responsible for ensur-
ing the required acquisition time has passed between
selecting the desired input channel and setting the
GO/DONE bit. This occurs when the ACQT<2:0> bits
(ADCON1<5:3>) remain in their Reset state (‘000’) and
is compatible with devices that do not offer
programmable acquisition times.
If desired, the ACQT bits can be set to select a pro-
grammable acquisition time for the A/D module. When
the GO/DONE bit is set, the A/D module continues to
sample the input for the selected acquisition time, then
automatically begins a conversion. Since the acquisi-
tion time is programmed, there may be no need to wait
for an acquisition time between selecting a channel and
setting the GO/DONE bit.
In either case, when the conversion is completed, the
GO/DONE bit is cleared, the ADIF flag is set and the
A/D begins sampling the currently selected channel
again. If an acquisition time is programmed, there is
nothing to indicate if the acquisition time has ended or
if the conversion has begun.
21.3
The A/D conversion time per bit is defined as T
A/D conversion requires 11 T
The source of the A/D conversion clock is software
selectable.
There are seven possible options for T
• 2 T
• 4 T
• 8 T
• 16 T
• 32 T
• 64 T
• Internal RC Oscillator
For correct A/D conversions, the A/D conversion clock
(T
minimum T
more information).
Table 21-1
from the device operating frequencies and the A/D
clock source selected.
 2011 Microchip Technology Inc.
AD
) must be as short as possible but greater than the
OSC
OSC
OSC
OSC
OSC
OSC
Selecting and Configuring
Automatic Acquisition Time
Selecting the A/D Conversion
Clock
AD
provides the resultant T
(see parameter 130 in
AD
per 10-bit conversion.
AD
AD
Table 29-31
times derived
:
AD
. The
for
PIC18F46J11 FAMILY
TABLE 21-1:
21.4
The ANCON0, ANCON1 and TRISA registers control
the operation of the A/D port pins. The port pins needed
as analog inputs must have their corresponding TRIS
bits set (input). If the TRIS bit is cleared (output), the
digital output level (V
The A/D operation is independent of the state of the
CHS<3:0> bits and the TRIS bits.
Note 1:
Note 1: When reading the PORT register, all pins
Operation
16 T
32 T
64 T
2 T
4 T
8 T
AD Clock Source (T
RC
2:
OSC
OSC
OSC
2: Analog levels on any pin defined as a
Configuring Analog Port Pins
OSC
OSC
OSC
(2)
The RC source has a typical T
4 s.
For device frequencies above 1 MHz, the
device must be in Sleep mode for the
entire conversion or the A/D accuracy may
be out of specification.
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as digital inputs will convert an
analog input. Analog levels on a digitally
configured input will be accurately
converted.
digital input may cause the digital input
buffer to consume current out of the
device’s specification limits.
T
FREQUENCIES
AD
OH
ADCS<2:0>
vs. DEVICE OPERATING
or V
000
100
001
101
010
110
011
AD
OL
)
) will be converted.
DS39932D-page 357
Frequency
22.86 MHz
45.71 MHz
11.43 MHz
Maximum
1.00 MHz
2.86 MHz
5.71 MHz
48.0 MHz
Device
AD
time of
(1)

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