PIC18F24J11 MICROCHIP [Microchip Technology], PIC18F24J11 Datasheet - Page 506

• Manufacturer Part Number: PIC18F24J11
• Description: 28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F46J11 FAMILY
FIGURE 29-23:
TABLE 29-31: A/D CONVERSION REQUIREMENTS
DS39932D-page 506
130
131
132
135
137
Note 1:
Param
No.
Note 1: If the A/D clock source is selected as RC, a time of T
A/D DATA
SAMPLE
A/D CLK
2:
3:
4:
ADRES
BSF ADCON0, GO
T
T
T
T
T
Symbol
ADIF
AD
CNV
ACQ
SWC
DIS
2: This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
GO
Q4
The time of the A/D clock period is dependent on the device frequency and the T
ADRES registers may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (V
On the following cycle of the device clock.
This allows the SLEEP instruction to be executed.
132
A/D Clock Period
Conversion Time
(not including acquisition time)
Acquisition Time
Switching Time from Convert  Sample
Discharge Time
A/D CONVERSION TIMING
(Note 2)
Characteristic
DD
9
(3)
to V
SS
8
or V
OLD_DATA
SS
7
(2)
to V
. . .
SAMPLING STOPPED
DD
). The source impedance (R
CY
. . .
CY
131
130
cycle.
is added before the A/D clock starts.
Min
0.7
1.4
0.2
11
—
—
2
(Note 4)
25.0
Max
12
—
—
1
1
(1)
Units
T
s
s
s
s
AD
S
0
) on the input channels is 50.
 2011 Microchip Technology Inc.
T
A/D RC Mode
-40C to +85C
OSC
AD
based, V
clock divider.
NEW_DATA
DONE
Conditions
T
CY
REF
(Note 1)
 3.0V