PIC18F24J11 MICROCHIP [Microchip Technology], PIC18F24J11 Datasheet - Page 525

• Manufacturer Part Number: PIC18F24J11
• Description: 28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

INTCON ........................................................................... 117
INTCON Registers ........................................................... 117
Inter-Integrated Circuit. See I
Internal Oscillator
Internal Oscillator Block ..................................................... 40
Internal RC Oscillator
Internal Voltage Reference Specifications ....................... 483
Internet Address ............................................................... 533
Interrupt Sources ............................................................. 395
Interrupts .......................................................................... 115
Interrupts, Flag Bits
INTOSC Frequency Drift .................................................... 41
INTOSC, INTRC. See Internal Oscillator Block.
IORLW ............................................................................. 436
IORWF ............................................................................. 436
 2011 Microchip Technology Inc.
NEGF ....................................................................... 441
NOP ......................................................................... 441
Opcode Field Descriptions ....................................... 414
POP ......................................................................... 442
PUSH ....................................................................... 442
RCALL ..................................................................... 443
RESET ..................................................................... 443
RETFIE .................................................................... 444
RETLW .................................................................... 444
RETURN .................................................................. 445
RLCF ........................................................................ 445
RLNCF ..................................................................... 446
RRCF ....................................................................... 446
RRNCF .................................................................... 447
SETF ........................................................................ 447
SETF (Indexed Literal Offset Mode) ........................ 461
SLEEP ..................................................................... 448
Standard Instructions ............................................... 413
SUBFWB .................................................................. 448
SUBLW .................................................................... 449
SUBWF .................................................................... 449
SUBWFB .................................................................. 450
SWAPF .................................................................... 450
TBLRD ..................................................................... 451
TBLWT ..................................................................... 452
TSTFSZ ................................................................... 453
XORLW .................................................................... 453
XORWF .................................................................... 454
Frequency Drift. See INTOSC Frequency Drift.
Adjustment ................................................................. 41
OSCTUNE Register ................................................... 41
Use with WDT .......................................................... 405
A/D Conversion Complete ....................................... 355
Capture Complete (ECCP) ...................................... 249
Compare Complete (ECCP) .................................... 251
Interrupt-on-Change (RB7:RB4) .............................. 138
TMR0 Overflow ........................................................ 199
TMR1 Overflow ........................................................ 207
TMR3 Overflow ................................................ 215, 223
TMR4 to PR4 Match ................................................ 226
TMR4 to PR4 Match (PWM) .................................... 225
Control Bits .............................................................. 115
Control Registers. See INTCON Registers.
During, Context Saving ............................................ 130
INTx Pin ................................................................... 130
PORTB, Interrupt-on-Change .................................. 130
RCON Register ........................................................ 129
TMR0 ....................................................................... 130
Interrupt-on-Change (RB7:RB4) Flag (RBIF Bit) ..... 138
2
C.
PIC18F46J11 FAMILY
L
LFSR ............................................................................... 437
Low-Power Modes ............................................................. 47
M
Master Clear (MCLR) ......................................................... 65
Master Synchronous Serial Port (MSSP). See MSSP.
Memory Organization ........................................................ 77
Memory Programming Requirements .............................. 482
Microchip Internet Web Site ............................................. 533
MOVF .............................................................................. 437
MOVFF ............................................................................ 438
MOVLB ............................................................................ 438
MOVLW ........................................................................... 439
MOVSF ............................................................................ 457
MOVSS ............................................................................ 458
MOVWF ........................................................................... 439
MPLAB ASM30 Assembler, Linker, Librarian .................. 464
MPLAB ICD 2 In-Circuit Debugger .................................. 465
MPLAB ICE 2000 High-Performance Universal In-Circuit
MPLAB Integrated Development Environment Software . 463
MPLAB PM3 Device Programmer ................................... 465
MPLAB REAL ICE In-Circuit Emulator System ............... 465
MPLINK Object Linker/MPLIB Object Librarian ............... 464
MSSP
MULLW ............................................................................ 440
MULWF ............................................................................ 440
N
NEGF ............................................................................... 441
Clock Transitions and Status Indicators .................... 48
Deep Sleep Mode ...................................................... 54
Exiting Idle and Sleep Modes .................................... 54
Idle Modes ................................................................. 52
Multiple Sleep Commands ......................................... 48
Run Modes ................................................................ 48
Sleep Mode ............................................................... 51
Summary (table) ........................................................ 48
Ultra Low-Power Wake-up ......................................... 61
Data Memory ............................................................. 84
Program Memory ....................................................... 77
Return Address Stack ................................................ 79
Emulator .................................................................. 465
ACK Pulse ....................................................... 296, 299
I
Module Overview ..................................................... 271
SPI Master/Slave Connection .................................. 276
TMR4 Output for Clock Shift .................................... 226
2
C Mode. See I
and RTCC Peripheral ........................................ 56
Brown-out Reset (DSBOR) ................................ 56
Preparing for ...................................................... 55
Registers ........................................................... 58
Typical Sequence .............................................. 57
Wake-up Sources .............................................. 56
Watchdog Timer (DSWDT) ................................ 56
By Interrupt ........................................................ 54
By Reset ............................................................ 54
By WDT Time-out .............................................. 54
Without an Oscillator Start-up Delay ................. 54
PRI_IDLE .......................................................... 52
RC_IDLE ........................................................... 54
SEC_IDLE ......................................................... 52
PRI_RUN ........................................................... 48
RC_RUN ............................................................ 50
SEC_RUN ......................................................... 48
2
C Mode.
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