PIC18F24J11 MICROCHIP [Microchip Technology], PIC18F24J11 Datasheet - Page 298

• Manufacturer Part Number: PIC18F24J11
• Description: 28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F46J11 FAMILY
19.5.3.4
Unlike 5-Bit Address Masking mode, 7-Bit Address
Masking mode uses a mask of up to eight bits (in 10-bit
addressing) to define a range of addresses than can be
Acknowledged, using the lowest bits of the incoming
address. This allows the module to Acknowledge up to
127 different addresses with 7-bit addressing, or
255 with 10-bit addressing (see
mode is the default configuration of the module, and is
selected when MSSPMSK is unprogrammed (‘1’).
The address mask for 7-Bit Address Masking mode is
stored in the SSPxMSK register, instead of the
SSPxCON2 register. SSPxMSK is a separate hard-
ware register within the module, but it is not directly
addressable. Instead, it shares an address in the SFR
space with the SSPxADD register. To access the
SSPxMSK register, it is necessary to select MSSP
mode, ‘1001’ (SSPCON1<3:0> = 1001), and then read
or write to the location of SSPxADD.
To use 7-Bit Address Masking mode, it is necessary to
initialize SSPxMSK with a value before selecting the
I
sequence of events is:
1.
2.
3.
EXAMPLE 19-4:
DS39932D-page 298
2
C Slave Addressing mode. Thus, the required
7-Bit Addressing:
10-Bit Addressing:
Select
(SSPxCON2<3:0> = 1001).
Write the mask value to the appropriate
SSPxADD register address (FC8h for MSSP1,
F6Eh for MSSP2).
Set
(SSPxCON2<3:0> = 0111 for 10-bit addressing,
0110 for 7-bit addressing).
SSPxADD<7:1>= 1010 000
SSPxMSK<7:1>= 1111 001
Addresses Acknowledged = ACh, A8h, A4h, A0h
SSPxADD<7:0> = 1010 0000 (The two MSbs are ignored in this example since they are not affected)
SSPxMSK<7:0> = 1111 0011
Addresses Acknowledged = ACh, A8h, A4h, A0h
the
7-Bit Address Masking Mode
SSPxMSK
appropriate
ADDRESS MASKING EXAMPLES IN 7-BIT MASKING MODE
I
2
Access
C
Example
Slave
19-4). This
mode
mode
Setting or clearing mask bits in SSPxMSK behaves in
the opposite manner of the ADMSK bits in 5-Bit
Address Masking mode. That is, clearing a bit in
SSPxMSK causes the corresponding address bit to be
masked; setting the bit requires a match in that
position. SSPxMSK resets to all ‘1’s upon any Reset
condition and, therefore, has no effect on the standard
MSSP operation until written with a mask value.
With 7-Bit Address Masking mode, SSPxMSK<7:1>
bits mask the corresponding address bits in the
SSPxADD register. For any SSPxMSK bits that are
active
SSPxADD address bit is ignored (SSPxADD<n> = x).
For the module to issue an address Acknowledge, it is
sufficient to match only on addresses that do not have
an active address mask.
With 10-Bit Address Masking mode, SSPxMSK<7:0>
bits mask the corresponding address bits in the
SSPxADD register. For any SSPxMSK bits that are
active (= 0), the corresponding SSPxADD address bit
is ignored (SSPxADD<n> = x).
Note:
(SSPxMSK<n> = 0),
The two MSbs of the address are not
affected by address masking.
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the
corresponding