GS4910B GENNUM [Gennum Corporation], GS4910B Datasheet - Page 102

• Manufacturer Part Number: GS4910B
• Description: HD/SD/Graphics Clock and Timing Generator with GENLOCK
• Manufacturer: GENNUM [Gennum Corporation]

Table 3-13: Configuration and Status Registers (Continued)
Register Name
H_Start_4
H_Stop_4
V_Start_4
V_Stop_4
Address
66h
67h
68h
68h
69h
69h
36655 - 2
Bit
15-0
15-0
15
14-0
15
14-0
April 2006
Description
The value programmed in this register indicates the
pixel start point for the leading edge of the
user-programmed H Sync signal USER4_H.
NOTE: The value programmed in this register must be
less than the value programmed in H_Stop_4.
Reference:
The value programmed in this register indicates the
pixel end point for the trailing edge of the
user-programmed H Sync signal USER4_H.
NOTE: The value programmed in this register must not
exceed the maximum number of clock periods per line
of the outgoing standard.
Reference:
Reserved. Set this bit to zero when writing to 68h.
The value programmed in this register indicates the start
line number of the leading edge of the
user-programmed V Sync signal USER4_V. For
interlaced output standards, this value corresponds to
the odd field line number.
NOTE: The value programmed in this register must be
less than the value programmed in V_Stop_4.
Reference:
Reserved. Set this bit to zero when writing to 69h.
The value programmed in this register indicates the end
line number of the trailing edge of the user-programmed
V Sync signal USER4_V. For interlaced output
standards, this value corresponds to the odd field line
number.
NOTE: The value programmed in this register must not
exceed the maximum number of lines per field of the
outgoing standard.
Reference:
Section 3.8.3
Section 3.8.3 on page 69
Section 3.8.3 on page 69
Section 3.8.3 on page 69
GS4911B/GS4910B Data Sheet
R/W
R/W
R/W
–
R/W
–
R/W
Default
0
0
–
0
–
0
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