GS4910B GENNUM [Gennum Corporation], GS4910B Datasheet - Page 43

• Manufacturer Part Number: GS4910B
• Description: HD/SD/Graphics Clock and Timing Generator with GENLOCK
• Manufacturer: GENNUM [Gennum Corporation]

3.4 Input Reference Signals
3.4.1 HSYNC, VSYNC, and FSYNC
CHROMA DATA OUT
LUMA DATA OUT
HSYNC
VSYNC
FSYNC
PCLK
H
V
F
H Signal Timing
Typical H Timing
Alternative H Timing
3FF
3FF
000
000
The HSYNC, VSYNC, FSYNC, and 10FID reference signals are applied to the
GS4911B/GS4910B via the designated input pins.
To operate in Genlock mode, the input reference signals must be valid and must
conform to a recognized video or graphics standard (see
Alternatively, if VID_STD[5:0] = 62, the signal applied to the HSYNC input must be
stable and have a period of less than 2.4ms.
In Free Run mode, no input reference is required.
Section 3.4.1 on page 43
The 10FID input signal is discussed in
Timing for Video Formats
The HSYNC, VSYNC, and FSYNC input reference signals may have analog
timing, such as from Gennum’s GS4981/82 sync separators
have digital timing, such as from Gennum’s GS1559/60A/61 deserializers
(Figure
formats recognized by the GS4911B/GS4910B.
If the input reference format does not include an F sync signal, the FSYNC pin
should be held LOW.
Figure 3-3: Example HSYNC, VSYNC, and FSYNC Analog Input Timing from a
Sync Separator
Figure 3-4: Example H Blanking, V Blanking, and F Digital Input Timing from an
SDI Deserializer
36655 - 2
000
000
3-4).
April 2006
Section 1.4 on page 20
H:V:F TIMING - HD 20-BIT OUTPUT MODE
XYZ (eav)
XYZ (eav)
describes the HSYNC, VSYNC and FSYNC input timing.
lists the 36 pre-programmed video timing
Section 3.4.2 on page
GS4911B/GS4910B Data Sheet
3FF
3FF
000
000
Section 3.5 on page
(Figure
44.
000
000
3-3), or may
XYZ (sav)
XYZ (sav)
43 of 113
45).