GS4910B GENNUM [Gennum Corporation], GS4910B Datasheet - Page 14
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GS4910B
Manufacturer Part Number
GS4910B
Description
HD/SD/Graphics Clock and Timing Generator with GENLOCK
Manufacturer
GENNUM [Gennum Corporation]
Datasheet
1.GS4910B.pdf
(113 pages)
- Current page: 14 of 113
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Table 1-1: Pin Descriptions (Continued)
Pin
Number
36
37
39
40
Name
TIMING_OUT_2
TIMING_OUT_3
TIMING_OUT_4
TIMING_OUT_5
Timing
Synchronous
with PCLK1 ~
PCLK3
Synchronous
with PCLK1 ~
PCLK3
Synchronous
with PCLK1 ~
PCLK3
Synchronous
with PCLK1 ~
PCLK3
36655 - 2
April 2006
Type
Output
Output
Output
Output
Description
TIMING SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
Selectable timing output.
Selectable from: H sync; H blanking; V sync; V blanking; F sync; F
digital; Display Enable; 10 field ID (film cadence); AFS video/audio timing
(GS4911B only); USER_1~4.
See
NOTE: Default output is H blanking.
The current drive capability of this pin may be set high or low via
designated registers in the host interface. By default, the current drive
will be low.
This signal will be high impedance when VID_STD[5:0] = 00h.
TIMING SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
Selectable timing output.
Selectable from: H sync; H blanking; V sync; V blanking; F sync; F
digital; Display Enable; 10 field ID (film cadence); AFS video/audio timing
(GS4911B only); USER_1~4.
See
NOTE: Default output is V Sync.
The current drive capability of this pin may be set high or low via
designated registers in the host interface. By default, the current drive
will be low.
This signal will be high impedance when VID_STD[5:0] = 00h.
TIMING SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
Selectable timing output.
Selectable from: H sync; H blanking; V sync; V blanking; F sync; F
digital; Display Enable; 10 field ID (film cadence); AFS video/audio timing
(GS4911B only); USER_1~4.
See
NOTE: Default output is V blanking.
The current drive capability of this pin may be set high or low via
designated registers in the host interface. By default, the current drive
will be low.
This signal will be high impedance when VID_STD[5:0] = 00h.
TIMING SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
Selectable timing output.
Selectable from: H sync; H blanking; V sync; V blanking; F sync; F
digital; Display Enable; 10 field ID (film cadence); AFS video/audio timing
(GS4911B only); USER_1~4.
See
NOTE: Default output is F Sync.
The current drive capability of this pin may be set high or low via
designated registers in the host interface. By default, the current drive
will be low.
This signal will be high impedance when VID_STD[5:0] = 00h.
Section 1.5 on page 25
Section 1.5 on page 25
Section 1.5 on page 25
Section 1.5 on page 25
GS4911B/GS4910B Data Sheet
for signal descriptions.
for signal descriptions.
for signal descriptions.
for signal descriptions.
14 of 113
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