S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 130

• Manufacturer Part Number: S912XEG128J2MAL
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
• Manufacturer: Freescale Semiconductor

Specifications of S912XEG128J2MAL

• Rohs: yes
• Core: RISC
• Processor Series: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 12 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-112
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 8
• Data Rom Size: 4 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• On-chip Dac: Yes
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

1. Read: Anytime.
Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.37
130
Function
Address 0x0250
Write: Anytime.
Altern.
Field
PTM
PTM
Reset
7-6
5
W
R
(TXCAN4)
Port M general purpose input/output data—Data Register
Port M pins 7 and 6 are associated with TXCAN and RXCAN signals of CAN3 and the routed CAN4, as well as with
TXD and RXD signals of SCI3, respectively.
The CAN3 function takes precedence over the CAN4, SCI3 and the general purpose I/O function if the CAN3 module
is enabled. The CAN4 function takes precedence over the SCI3 and the general purpose I/O function if the CAN4
module is enabled. The SCI3 function takes precedence over the general purpose I/O function if the SCI3 module
is enabled.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port M general purpose input/output data—Data Register
Port M pin 5 is associated with the TXCAN signal of CAN2 and the routed CAN4 and CAN0, as well as with SCK
signals of SPI0.
The CAN2 function takes precedence over the routed CAN0, routed CAN4, the routed SPI0 and the general purpose
I/O function if the CAN2 module is enabled. The routed CAN0 function takes precedence over the routed CAN4, the
routed SPI0 and the general purpose I/O function if the routed CAN0 module is enabled. The routed CAN4 function
takes precedence over the routed SPI0 and general purpose I/O function if the routed CAN4 module is enabled. The
routed SPI0 function takes precedence of the general purpose I/O function if the routed SPI0 is enabled.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
TXCAN3
PTM7
TXD3
Port M Data Register (PTM)
—
—
0
7
(RXCAN4)
RXCAN3
PTM6
RXD3
—
—
0
6
Table 2-33. PTM Register Field Descriptions
MC9S12XE-Family Reference Manual Rev. 1.25
Figure 2-35. Port M Data Register (PTM)
(TXCAN0)
(TXCAN4)
TXCAN2
(SCK0)
PTM5
—
0
5
(RXCAN0)
(RXCAN4)
RXCAN2
(MOSI0)
PTM4
—
0
4
Description
(TXCAN0)
TXCAN1
PTM3
(SS0)
—
—
3
0
(RXCAN0)
RXCAN1
(MISO0)
PTM2
—
—
0
2
Access: User read/write
TXCAN0
Freescale Semiconductor
PTM1
—
—
—
—
0
1
RXCAN0
PTM0
—
—
—
—
0
0
(1)