S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 638

• Manufacturer Part Number: S912XEG128J2MAL
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
• Manufacturer: Freescale Semiconductor

Specifications of S912XEG128J2MAL

• Rohs: yes
• Core: RISC
• Processor Series: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 12 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-112
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 8
• Data Rom Size: 4 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• On-chip Dac: Yes
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
16.3.3.3
This register keeps the data length field of the CAN frame.
16.3.3.4
This register defines the local priority of the associated message buffer. The local priority is used for the
internal prioritization process of the MSCAN and is defined to be highest for the smallest binary number.
The MSCAN implements the following internal prioritization mechanisms:
638
Module Base + 0x00XC
DLC[3:0]
Field
•
3-0
Reset:
All transmission buffers with a cleared TXEx flag participate in the prioritization immediately
before the SOF (start of frame) is sent.
W
R
Data Length Code Bits — The data length code contains the number of bytes (data byte count) of the respective
message. During the transmission of a remote frame, the data length code is transmitted as programmed while
the number of transmitted data bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.
Table 16-35
Data Length Register (DLR)
Transmit Buffer Priority Register (TBPR)
Figure 16-35. Data Length Register (DLR) — Extended Identifier Mapping
7
x
DLC3
0
0
0
0
0
0
0
0
1
shows the effect of setting the DLC bits.
= Unused; always read “x”
6
x
Table 16-34. DLR Register Field Descriptions
MC9S12XE-Family Reference Manual Rev. 1.25
DLC2
0
0
0
0
1
1
1
1
0
Table 16-35. Data Length Codes
Data Length Code
5
x
DLC1
4
x
0
0
1
1
0
0
1
1
0
Description
DLC3
x
3
DLC0
0
1
0
1
0
1
0
1
0
DLC2
2
x
Data Byte
Count
Freescale Semiconductor
DLC1
0
1
2
3
4
5
6
7
8
x
1
DLC0
0
x