S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 383

• Manufacturer Part Number: S912XEG128J2MAL
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
• Manufacturer: Freescale Semiconductor

Specifications of S912XEG128J2MAL

• Rohs: yes
• Core: RISC
• Processor Series: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 12 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-112
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 8
• Data Rom Size: 4 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• On-chip Dac: Yes
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

10.8.1.3
Operands for immediate mode instructions are included in the instruction stream and are fetched into the
instruction queue along with the rest of the 16 bit instruction. The ’#’ symbol is used to indicate an
immediate addressing mode operand. This address mode is used for semaphore instructions.
Examples:
10.8.1.4
The 4 bit wide immediate addressing mode is supported by all shift instructions.
RD = RD ∗ IMM4
Examples:
10.8.1.5
The 8 bit wide immediate addressing mode is supported by four major commands (ADD, SUB, LD, CMP).
RD = RD ∗ imm8
Examples:
10.8.1.6
The 16 bit wide immediate addressing mode is a construct to simplify assembler code. Instructions which
offer this mode are translated into two opcodes using the eight bit wide immediate addressing mode.
RD = RD ∗ IMM16
Examples:
10.8.1.7
In this addressing mode only one operand is explicitly given. This operand can either be the source (f(RD)),
the target (RD = f()), or both source and target of the operation (RD = f(RD)).
Examples:
Freescale Semiconductor
CSEM
SSEM
LSL
LSR
ADDL
SUBL
LDH
CMPL
LDW
ADD
JAL
SIF
Immediate 3-Bit Wide (IMM3)
Immediate 4 Bit Wide (IMM4)
Immediate 8 Bit Wide (IMM8)
Immediate 16 Bit Wide (IMM16)
Monadic Addressing (MON)
#1
#3
R4,#1
R4,#3
R1,#1
R2,#2
R3,#3
R4,#4
R4,#$1234
R4,#$5678
R1
R2
; Unlock semaphore 1
; Lock Semaphore 3
; R4 = R4 << 1; shift register R4 by 1 bit to the left
; R4 = R4 >> 3; shift register R4 by 3 bits to the right
; adds an 8 bit value to register R1
; subtracts an 8 bit value from register R2
; loads an 8 bit immediate into the high byte of Register R3
; compares the low byte of register R4 with an immediate value
; PC = R1, R1 = PC+2
; Trigger IRQ associated with the channel number in R2.L
MC9S12XE-Family Reference Manual Rev. 1.25
; translated to LDL R4,#$34; LDH R4,#$12
; translated to ADDL R4,#$78; ADDH R4,#$56
Chapter 10 XGATE (S12XGATEV3)
383